Publications & Works

Articles Published in Journals That Entered SCI, SSCI and AHCI Indexes

Exploiting Existing Comparators for Fine-Grained Low-Cost Error Detection

ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, vol.11, no.3, pp.233-256, 2014 (Journal Indexed in SCI) Creative Commons License identifier identifier

Bit Impact Factor: Towards making fair vulnerability comparison

Microprocessors and Microsystems, vol.38, no.6, pp.598-604, 2014 (Journal Indexed in SCI) Creative Commons License identifier identifier

Using tag-match comparators for detecting soft errors

IEEE Computer Architecture Letters, vol.6, no.2, 2007 (Journal Indexed in SCI Expanded) identifier

Refereed Congress / Symposium Publications in Proceedings

Uygulamaların Güvenilirlik Analizi

İşlemci Tasarım Çalıştayı, Turkey, 19 September 2019

Error Tolerating Methods for Increasing NAND Flash Memory Lifetime


Designing and Modelling Selective Replication for Fault-tolerant HPC Applications

17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID), Madrid, Spain, 14 - 17 May 2017, pp.452-457 Creative Commons License identifier

A runtime heuristic to selectively replicate tasks for application-specific reliability targets

IEEE International Conference on Cluster Computing (CLUSTER), Taipei, Taiwan, 13 - 15 September 2016, pp.498-505 Creative Commons License identifier identifier

CRC Based Memory Reliability for Task Parallel HPC Applications

2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS), Chicago, United States Of America, 23 - 27 May 2016, pp.1101-1112

Energy minimization at all layers of the data center The ParaDIME project

Design Automation and Test in Europe, Dresden, Germany, 14 - 18 March 2016, pp.684-689

Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm

2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), Heraklion, Crete, Greece, 17 - 19 February 2016

JSRAM: A circuit-level technique for trading-off robustness and capacity in cache memories

IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, 8 - 10 July 2015, pp.149-154 identifier identifier

Flexicache Highly Reliable and Low Power Cache under Supply Voltage Scaling

Latin American High Performance Computing Conference, Valparaiso, Chile, 20 - 22 October 2014, pp.173-190

System-level power amp energy estimation methodology and optimization techniques for CPU-GPU based mobile platforms

2014 IEEE 12th Symposium on Embedded Systems for Real-time Multimedia (ESTIMedia), Greater Noida, India, 16 - 17 October 2014

ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy

17th Euromicro Conference on Digital System Design (DSD), Verona, Italy, 27 - 29 August 2014, pp.191-198 Creative Commons License identifier identifier

Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

20th IEEE International On-Line Testing Symposium, IOLTS 2014, Catalunya, Spain, 7 - 09 July 2014, pp.1-6 identifier identifier

Neighbor cell assisted error correction for MLC NAND flash memories

The 2014 ACM international conference on Measurement and modeling of computer systems - SIGMETRICS '14, Texas, United States Of America, 16 - 20 June 2014, pp.491-504

Combining error detection and transactional memory for energy-efficient computing below safe operation margins

2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014, Turin, Italy, 12 - 14 February 2014, pp.248-255 identifier identifier

Fault tolerance for multi-threaded applications by leveraging hardware transactional memory

2013 ACM International Conference on Computing Frontiers, CF 2013, Ischia, Italy, 14 - 16 May 2013 identifier

Circuit design of a novel adaptable and reliable L1 data cache

23rd ACM International Conference of the Great Lakes Symposium on VLSI, GLSVLSI 2013, Paris, France, 2 - 03 May 2013, pp.333-334 Creative Commons License identifier

FaulTM Error Detection and Recovery Using Hardware Transactional Memory

Design Automation and Test in Europe, Grenoble, France, 18 - 22 March 2013, pp.220-2205

Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime

2012 IEEE 30th International Conference on Computer Design, ICCD 2012, Montreal, Canada, 30 September - 03 October 2012, pp.94-101 Creative Commons License identifier identifier

SymptomTM: Symptom-based error detection and recovery using Hardware Transactional Memory

20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011, Galveston, TX, United States Of America, 10 - 14 October 2011, pp.199-200 identifier

FIMSIM A fault injection infrastructure for microarchitectural simulators

2011 IEEE 29th International Conference on Computer Design (ICCD), Boston, United States Of America, 9 - 12 October 2011, pp.431-432

Books & Book Chapters

Transactional Memory for Reliability

in: Transactional Memory. Foundations, Algorithms, Tools, and Applications, Guerraoui R., Romano P. , Editor, Springer International Publishing, İsviçre, pp.268-282, 2015

Transactional Memory for Reliability

in: Transactional Memory Foundations Algorithms Tools and Applications, Rachid Guerraoui ve Paolo Romano, Editor, Springer, pp.268-282, 2014