Dr. Öğr. Üyesi BURAK ÜNAL


Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği

Elektronik


Yayınlardaki İsimler: Unal Burak

Araştırmacı kurumdan ayrılmıştır

Metrikler

Yayın

6

Yayın (WoS)

2

Yayın (Scopus)

3

Atıf (WoS)

6

H-İndeks (WoS)

1

Atıf (Scopus)

13

H-İndeks (Scopus)

1

Proje

1

Biyografi

Dr. Burak Ünal received the B.Sc. degree (Hons.) in Electrical and Electronics Engineering from Erciyes University, Kayseri, Turkey, in 2008, the M.Sc. and  Ph.D. degree in Electrical and Computer Engineering from the University of Arizona, Tucson, AZ, USA, in 2013, and 2019. His current research interests include design, development, and analysis of low-complexity iterative decoding algorithms for error correction codes (low-density parity check) and their efficient hardware architectures.

Eğitim Bilgileri

2013 - 2019

2013 - 2019

Bütünleşik Doktora

The University of Arizona, Faculty of Engineering , Department of Electrical and Computer Engineering, Amerika Birleşik Devletleri

Verdiği Dersler

Yüksek Lisans

Yüksek Lisans

High Performance Computing

Lisans

Lisans

Digital Design

System on Chip Design

SCI, SSCI ve AHCI İndekslerine Giren Dergilerde Yayınlanan Makaleler

2018

2018

Hardware Implementation and Performance Analysis of Resource Efficient Probabilistic Hard Decision LDPC Decoders

ÜNAL B., Akoglu A., Ghaffari F., Vasic B.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS , cilt.65, sa.9, ss.3074-3084, 2018 (SCI-Expanded) identifier identifier

Hakemli Bilimsel Toplantılarda Yayımlanmış Bildiriler

2019

2019

Design of High Throughput FPGA-Based Testbed for Accelerating Error Characterization of LDPC Codes

Unal B., Hassan M. S., Mack J., Kumbhare N., Akoglu A.

2019 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2019, Cancun, Meksika, 9 - 11 Aralık 2019 identifier

2019

2019

Accelerated Shadow Detection and Removal Method

Richter E., Raettig R., Mack J., Valancius S., Unal B., Akoglu A.

16th IEEE/ACS International Conference on Computer Systems and Applications (AICCSA), Abu Dhabi, Birleşik Arap Emirlikleri, 3 - 07 Kasım 2019 identifier identifier

2017

2017

Efficient FPGA implementation of probabilistic gallager B LDPC decoder

Ghaffari F., ÜNAL B., Akoglu A., Le K., Declercq D., Vasic B.

2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Batumi, Gürcistan, 5 - 08 Aralık 2017

2017

2017

Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder

ÜNAL B., Ghaffari F., Akoglu A., Vasic B., Declercq D.

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), Strasbourg, France, 25 - 28 Haziran 2017 Creative Commons License

2016

2016

Resource efficient real-time processing of Contrast Limited Adaptive Histogram Equalization

ÜNAL B., Akoglu A.

2016 26th International Conference on Field Programmable Logic and Applications (FPL), Lausanne, Switzerland, 29 Ağustos - 02 Eylül 2016


Atıflar

Toplam Atıf Sayısı (WOS): 6

h-indeksi (WOS): 1