Sleep-aware wavelength and bandwidth assignment scheme for TWDM PON

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Butt R. A., Faheem M., Ashraf M. W., Arfeen A., Memon K. A., Khawaja A.

OPTICAL AND QUANTUM ELECTRONICS, vol.53, no.6, 2021 (SCI-Expanded) identifier identifier identifier

  • Publication Type: Article / Article
  • Volume: 53 Issue: 6
  • Publication Date: 2021
  • Doi Number: 10.1007/s11082-021-02955-3
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Academic Search Premier, Aerospace Database, Communication Abstracts, Compendex, INSPEC, Metadex, Civil Engineering Abstracts
  • Abdullah Gül University Affiliated: Yes


The energy efficiency and delay performance of PON are two inversely related phenomena. Higher sleep time of the Optical Network Units (ONUs) results in higher upstream (US) delays due to increased traffic queues during the ONU Asleep state. Although an efficient dynamic bandwidth and wavelength assignment (DWBA) scheme can decrease US delays by minimizing the bandwidth waste and improving the fairness of bandwidth distribution among the ONUs. However, the conventional DWBA schemes are not designed to work with cyclic sleep mode (CSM) and they keep on assigning bandwidth to ONUs even if the ONU is in Asleep state leading to wastage of bandwidth and degraded CSM performance. Therefore, in this work a sleep aware DWBA scheme for TWDM PON is presented to coordinate with CSM mode. It only assign bandwidth to Active ONUs during the guaranteed phase, surplus phase and excess phase allocation phases which minimizes the bandwidth waste and the bandwidth lost at the ONU end. The wavelength switching process is also improved by only considering the Active state ONUs to balance the traffic load on all the wavelengths. The simulation results support our claim as the SA-DWBA scheme on average achieves DWBA schemes due to up to 50% to 65% higher energy savings compared to other due to longer ONU Asleep times. However, the increased upstream delays of all the traffic classes in SA-DWBA scheme remain within the set delay limit of 50 ms.